J4 ›› 2006, Vol. 28 ›› Issue (8): 11-13.
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童元满 戴葵 王志英
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摘要:
在诸如信息安全应用领域中,除法运算特别是大数(多个机器字长整数)除法运算速度是制约公钥密码算法运算速度提高的瓶颈。针对公钥密码算法VLSI实现需要,本文在介 绍SD数据表示的基础提出了一种新的大数除法算法,并给出了其VLSI实现逻辑结构。实验结果表明,这种除法器的VLSI实现具有很好的性价比。
关键词: SD数据表示 大数除法 公钥密码
Abstract:
Division operations, especially very long integer (multi-precision integer) division operations are always the bottleneck of asymmetric key cryptogr aphic calculations. According to the requirements of asymmetric cryptographic algorithms' VLSI implementation, this paper presents a novel very long in nteger division algorithm based on the SD (signed digit) number representation. The implementation logic of the SD division unit is discussed in detai il The experimental results show that the SD division unit presented in the paper is highly efficient with good cost-performance trade-off.
Key words: SD number representation, very long integer division, asymmetric key cryptography
童元满 戴葵 王志英. 基于SD数据表示的大数除法VLSI高速实现[J]. J4, 2006, 28(8): 11-13.
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链接本文: http://joces.nudt.edu.cn/CN/
http://joces.nudt.edu.cn/CN/Y2006/V28/I8/11