前导0检测(LZD)是浮点加法运算的关键步骤，设计高速的前导0检测算法对提高浮点加法器性能具有重要意义。本文针对64位高性能微处理器浮点运算部件的应用需求，设计并实现了两种基于FFO的前导0检测算法，并对其进行了分析比较。综合结果表明，改进的并行LZD算法具有更高的检测性能，并且通过提前计算出规格化字节移位量，将前导0检测和规格化中的粗粒度移位并行化，进一步减少了整个浮点运算部件的延迟。

Leading Zero Detecting (LZD) is a quite critical step during the procedure of floatingpoint addition operation,and thus the design of a highperformance LZD algorithm is of great significance for improving the overall performance of a floatingpoint adder.In order to reach the demands of highperformance floatingpoint addition operations in 64bit CPU’s floatingpoint units,we design and implement two LZD algorithms based on FFO,and compare the  performances of them.According to the results of logic synthesis, a modified parallel LZD algorithm presented in this paper shows higher performance.Furthermore,by precalculating the amount of bytes in normalized shift operations,this algorithm can also parallelize LZD with coarsegrained byteshifting operations,which further reduces the latency in the critical path of the floatingpoint units.