本文以FPGA为平台，设计了在TDSCDMA分组域中实现数据包截获和过滤的系统框架以及基本功能模块，结合Bloom Filter等算法的特点提出了Hash算法实现数据包过滤，并用Verilog语言实现，程序下载至FPGA开发板进行了实测。结果表明，在大规模用户群中均匀抽取部分用户进行监管时，过滤设备可以线速地处理GTP数据包并完成设定用户的过滤。

Based on the FPGA platform, a system is designed which captures and filters data packets in the PS of the TDSCDMA core network. And a high speed strategy ，which takes advantage of the Bloom filter and other algorithms，is  proposed to filter data packets with the Hash algorithm , the strategy is implemented with Verilog. Finally,the programme downloaded to the FPGA development board is tested. When the users supervised obey the uniform distribution in a largescale way,it can process the GTP packets in a linear rate and filter the packets of the specified users.