• 中国计算机学会会刊
  • 中国科技核心期刊
  • 中文核心期刊

J4 ›› 2007, Vol. 29 ›› Issue (3): 74-76.

• 论文 • 上一篇    下一篇

流处理器延迟隐藏机制的优化及实现

李礼 文梅 伍楠 李海燕 张春元   

  • 出版日期:2007-03-01 发布日期:2010-05-30

  • Online:2007-03-01 Published:2010-05-30

摘要:

流体系结构在新兴的高性能计算机体系结构中备受关注,通过多种技术途径,流处理器能广泛深入地挖掘程序各种并行性。本文首先介绍流处理器访存延迟隐藏的技术,然后引入“链接”思想以进一步优化访存延迟隐藏机制,最后讨论了“链接”机制在流处理器上的实现。

关键词: 流体系结构 延迟隐藏 链接

Abstract:

The stream architecture is outstanding in the emerging high-performance computer architectures.Many kinds of parallelism can be exploited by stream pr ocessors.This paper first introduces the latency hiding mechanism of stream processors,and then introduces the "chaining" technology to further optimiize this mechanism.Finally,it discusses the implementation of the "chaining" mechanism in stream processors.

Key words: stream architecture;latency hiding;chaining