关键词: 微处理器 二级Cache 静态功耗 ADSR

Abstract:

The static power exceed the dynamic power in microprocessors as the feature size shrinks,especially for on-chip L2 caches.Beside developing low leakag e technologies and circuits,how to control the static power at the architectural level is worth being studied.In this paper,an ADSR algorithm is propose  d to optimize the L2 cache＇s static power dissipation.The SPEC CPU2000 simulation results show that,with negligible performance loss,ADSR can aggressiv  vely decrease the static power dissipation of on-chip L2 caches.

Key words: microprocessor;L2 cache;static power;ADSR