• 中国计算机学会会刊
  • 中国科技核心期刊
  • 中文核心期刊

J4 ›› 2007, Vol. 29 ›› Issue (7): 80-84.

• 论文 • 上一篇    下一篇

十亿晶体管处理器体系结构研究

温璞 杨学军   

  • 出版日期:2007-07-01 发布日期:2010-06-02

  • Online:2007-07-01 Published:2010-06-02

摘要:

半导体工艺技术的飞速发展促使单芯片内集成有更多的晶体管资源。如何利用丰富的片上资源,已成为处理器体系结构研究的一个重点。本文综述了目前关于十亿晶体管处理器结构的研究现状,认为在缓解当前处理器面临的存储墙问题、功耗问题、线延迟问题以及充分利用片上资源等方面,PIM结构是一种有效的途径,而与向量结构相结合则更
能体现PIM结构的高带宽.低延迟优势。

关键词: 十亿晶体管结构 存储墙 向量处理 Processor-in-Memory

Abstract:

Advances in semiconductor manufacturing will permit an unprecedented number of transistors on a single processor die. But what architecture will make  the best use of these riches become a focus. After surveying the research of billion-transistor architectures, we focus on PIM, which integrates the CMOS logic with DRAM memories on the same die, and provide high bandwidth,low latency and low power. PIM makes the best use of giant on-chip budget, but al so relaxes the eager memory-wall, power,and wire latency. Coupled with the vector processing logic, PIM can expose the advantages in itself.

Key words: (billion-transistor architecture, memory wall, vector processing, Processor-in-Memory)