关键词: 多个输入同时翻转 电路模拟 静态时序分析 测试波形生成 SpiceTime

Abstract:

To overcome the problems of traditional delay models, this paper uses a circuit simulator to calculate gate delay in static timing analysis. We analyz e the effect of the simultaneous switching of muhiple inputs（SSMI） on gate delay, and propose a SSMI model to calculate the worst case of gate delay.   Based on this model, we develop the test waveform generation algorithms for the complementary CMOS logic and the pass transistor logic. By combining the gate delay simulation with functional model extraction techniques of transistor circuits, we implement a transistor-level static timing analysis tool  called SpiceTime. The experimental results on ten ISCAS85 benchmark circuits indicate that the modules of significant sizes ean be verified by SpieeTime with high precisions.

Key words: MISS, circuit simulation, static timing analysis, test wavcform generation, SpiceTime