结深对65 nm体硅CMOS晶体管单粒子瞬态脉冲的影响

计算机工程与科学

结深对65 nm体硅CMOS晶体管单粒子瞬态脉冲的影响

刘蓉容，池雅庆，窦强

（国防科技大学计算机学院，湖南长沙 410073 ）

收稿日期:2016-03-14 修回日期:2016-12-07 出版日期:2017-12-25 发布日期:2017-12-25

Impact of junction depth on SET pulse width

in 65nm bulk CMOS transistor

LIU Rong-rong,CHI Ya-qing,DOU Qiang

(College of Computer,National University of Defense Technology,Changsha 410073,China)

Received:2016-03-14 Revised:2016-12-07 Online:2017-12-25 Published:2017-12-25

摘要/Abstract

摘要：

使用TCAD模拟工具，分析了纳米工艺下N+-N结、P+-P结和PN结深度的变化对PMOS 以及NMOS 单粒子瞬态（SET）脉冲宽度的影响，并考虑了电压温度变化下结深对晶体管单粒子瞬态的影响程度。结果表明，N+-N结的变化对PMOS晶体管单粒子瞬态脉冲宽度的影响最为显著。同时，还分析出N+-N、P+-P结在不同电压下的差异性较为明显，PN结在不同温度下的差异性较为显著。

关键词: N+-N结, P+-P结, PN结, 单粒子瞬态, PMOS, NMOS, 脉冲宽度

Abstract:

We investigate the impact of N+-N,P+-P and PN junction depth on the single-event transient (SET) pulse width in nano technology through TCAD simulations. The variations of voltage or temperature are also considered. Simulation results indicate that N+-N junction plays the most important role in influencing the SET pulse width. Meanwhile, we also investigate the impact of voltage and temperature on junction depth. Simulation results indicate that the voltage can significantly affect N+-N and P+-P junction while the temperature can significantly affect PN junction.

Key words: N+-N junction, P+-P junction, PN junction, single-event transient (SET), PMOS, NMOS, pulse width

刘蓉容，池雅庆，窦强. 结深对65 nm体硅CMOS晶体管单粒子瞬态脉冲的影响[J]. 计算机工程与科学.

LIU Rong-rong,CHI Ya-qing,DOU Qiang.

Impact of junction depth on SET pulse width

in 65nm bulk CMOS transistor

[J]. Computer Engineering & Science.