关键词: 片上系统, 嵌入式处理器, 低功耗设计, AMBA总线, 申威

Abstract: This paper describes the design of a high-performance embedded processor with high reliability, based on the self-developed Shenwei Instruction Set Architecture (ISA). The processor adopts System-on-Chip (SoC) design technology and AMBA on-chip bus. The third generation of self-developed Shenwei high performance 64-bit CPU core, namely Core3, and multiple standard I/O interface modules including PCIe2.0 and USB2.0 are integrated on the chip. The processor is manufactured using domestic mature process technology, and integrates more than 250 million transistors. The processor can run stably with a core frequency of 800 MHz under a wide environment temperature range (-55℃~125°C). The peak performance of double-precision floating-point number is up to 3.2 GFlops and the maximum power consumption is less than 3.2 W. In order to achieve the design goals of high reliability, low power consumption and high performance, the technical methods and means of the chip structure design, reliability design, low power design and physical implementation are introduced in detail, and the test results of the main technical indexes such as chip frequency, power consumption and yield are given. The processor has been applied in many information devices and has achieved good social benefits.

Key words: system-on-chip (SoC), embedded processor, low power design, AMBA bus, Shenwei