• 中国计算机学会会刊
  • 中国科技核心期刊
  • 中文核心期刊

计算机工程与科学 ›› 2025, Vol. 47 ›› Issue (06): 988-997.

• 高性能计算 • 上一篇    下一篇

ReHuff:基于ReRAM的Huffman编码硬件结构设计

郑道文1,周一开1,唐忆滨2,3,刘博生1,武继刚1   

  1. (1.广东工业大学计算机学院,广东 广州 510006;2.武汉数字工程研究所,湖北 武汉 430074;
    3.图形处理芯片及智能计算系统技术创新中心,湖北 武汉 430074)
  • 出版日期:2025-06-25 发布日期:2025-06-26
  • 基金资助:
    国家自然科学基金(62302102,62174038);广东省基础与应用基础研究基金(2023A1515012844,2022A1515110599)

ReHuff:A Huffman coding hardware architecture based on ReRAM

ZHENG Daowen1,ZHOU Yikai1,TANG Yibin2,3,LIU Bosheng1,WU Jigang1   

  1. (1.School of Computer Science and Technology,Guangdong University of Technology,Guangzhou 510006;
    2.Wuhan Institute of Digital Engineering,Wuhan 430074;
    3.Innovation Center for GPU and Intelligent Computing System Technology,Wuhan 430074,China)
  • Online:2025-06-25 Published:2025-06-26

摘要: 随着数据量在深度学习等各种应用场景中的迅速增大,通信和存储的硬件开销显著增加。在此背景下,压缩方法的重要性日益提升。哈夫曼编码是目前具备代表性且广泛应用的压缩方法之一,其特点是在不损害数据完整性的前提下,有效压缩数据并节省存储空间。然而,由于分层内存存储的限制,哈夫曼编码在传统硬件中的解决方案面临着高延迟和高能耗的挑战。提出了一种名为ReHuff的硬件架构,利用阻变随机存储器(ReRAM)实现在内存中直接进行哈夫曼编码。设计了基于ReRAM的哈夫曼编码映射方法,以提取有效数据。针对映射过程中存在的变长编码数据与定长ReRAM块之间的匹配问题,提出了适应架构设计的双阶段变长数据选择与分割方法,整合变长输出以节省能耗并提升ReRAM的利用效率。仿真结果表明,所提出的设计方案的性能与能耗表现均优于代表性基准,在性能方面提高了18.6倍,在能耗方面降低了82.4%。

关键词: 哈夫曼编码, 数据压缩, 阻变随机存储器, 加速器设计, 数据映射

Abstract: With the rapid expansion of data volume in various application scenarios such as deep learning, the hardware overhead of communication and storage has significantly increased. Against this backdrop, the importance of compression methods has grown substantially. Huffman coding is one of the most representative and widely used compression methods, known for effectively compressing data and saving storage space without compro-mising data integrity. However, due to the limitations of hierarchical memory storage, traditional hardware solutions for Huffman coding face challenges of high latency and energy consumption. This paper proposes a hardware architecture named ReHuff, which leverages resistive random-access memory (ReRAM) to enable in-memory Huffman encoding, and  designs a ReRAM-based Huffman coding mapping method to extract valid data. To address the mismatch between variable-length encoded data and fixed-length ReRAM blocks during mapping, a dual-stage variable-length data selection and segmentation approach is proposed, adapting to the architectural design to integrate variable-length outputs, thereby reducing energy consumption and improving ReRAM utilization efficiency. Simulation results demonstrate that the proposed design out-performs representative benchmarks, improving performance by 18.6 times and reducing energy consumption by 82.4%.

Key words: Huffman coding, data compression, resistive random access memory, accelerator design, data mapping