关键词: 全定制 寄存器文件 定向通路 伪时序建模 YHFT系列DSP

Abstract:

In this paper, we discuss how to custom design a register file with 10R/6W ports and the forwarding path in the 0. 18μm CMOS technology. Compared wit h the half-customed register file based on standard cells, the area and power dissipation are reduced about 1/2 and the delay reduced from 2. 34ns to 1.  2ns. In order to reduce workload, we use a pseudo timing model. This design has been applied to YHFT-DSP chips.

Key words: custom design, register file, forwarding path, pseudo timing mode YHFT-DSP