• 中国计算机学会会刊
  • 中国科技核心期刊
  • 中文核心期刊

J4 ›› 2016, Vol. 38 ›› Issue (06): 1071-1077.

• 论文 •    下一篇

一种基于体系结构模板的粗粒度可重构SoC设计方法

沈剑良1,2,李思昆2,王观武2,吕平1,刘磊2,刘勤让1   

  1. (1.国家数字交换系统工程技术研究中心,河南 郑州 450002;
    2.国防科学技术大学计算机学院,湖南 长沙 410073)
  • 收稿日期:2015-10-13 修回日期:2015-12-17 出版日期:2016-06-25 发布日期:2016-06-25
  • 基金资助:

    国家863计划(2014AA01A704);国家自然科学基金创新群体项目(61521003)

A coarse grain reconfigurable SoC design
method based on architecture template   

SHEN Jianliang1,2,LI Sikun2,WANG Guanwu2,L Ping1,LIU Lei2,LIU Qinrang1   

  1. (1.National Digital Switching System Engineering & Technological R&D Center,Zhengzhou 450002;
    2.College of Computer,National University of Defense Technology,Changsha 410073,China)
  • Received:2015-10-13 Revised:2015-12-17 Online:2016-06-25 Published:2016-06-25

摘要:

针对传统的面向应用领域的多核SoC体系结构设计方法存在系统结构探索空间大、设计复杂度高等问题,提出了一种基于体系结构模板的粗粒度可重构SoC系统架构设计方法。该设计方法以体系结构设计为中心,体系结构模板可重用、参数可配置,从而缩小了体系结构设计探索空间,提高了体系结构设计效率,降低了应用程序编译器开发复杂性。最后,以密码处理领域为例,将模板参数实例化,构建了一个面向密码处理领域的多核可重构指令集处理器SoC系统(MultiRISP SoC)。实验结果表明,MultiRISP SoC系统与几个典型可重构平台在性能上相当,但系统构建更为快速高效。

关键词: 体系结构模板;多核SoC系统体系结构;粗粒度可重构SoC

Abstract:

Since the traditional design methods of MPSoC have large design exploration space and high design complexity, we propose a coarse grain reconfigurable SoC design method based on architecture template. The architecture template can be reused, and its parameters can be configured, so the method can reduce the design exploration space, and improve the design efficiency and computational performance. The design templates are instantiated, and a cryptographic applicationspecific multireconfigurable instruction sets processor SoC(MultiRISP SoC) is constructed. Experimental results show that the performance of the MultiRISP SoC is equivalent to several typical reconfigurable platforms, but its system is more efficient.

Key words: architecture template;multicore SoC system architecture;coarse grain reconfigurable SoC