• 中国计算机学会会刊
  • 中国科技核心期刊
  • 中文核心期刊

计算机工程与科学 ›› 2020, Vol. 42 ›› Issue (11): 1913-1921.

• 高性能计算 • 上一篇    下一篇

矩阵乘协处理器上BLAS level-3运算的设计

贾迅,钱磊,原昊,张昆,吴东   

  1. (数学工程与先进计算国家重点实验室,江苏 无锡 214125)
  • 收稿日期:2020-06-08 修回日期:2020-08-11 接受日期:2020-11-25 出版日期:2020-11-25 发布日期:2020-11-26

Design of BLAS level3 computation on a matrix multiplication coprocessor

JIA Xun,QIAN Lei,YUAN Hao,ZHANG Kun,WU Dong   

  1. (State Key Laboratory of Mathematical Engineering and Advanced Computing,Wuxi 214125,China)
  • Received:2020-06-08 Revised:2020-08-11 Accepted:2020-11-25 Online:2020-11-25 Published:2020-11-26

摘要: BLAS level3运算的计算复杂度较高,其往往成为应用的性能瓶颈。采用线性阵列结构的矩阵乘协处理器可实现高性能、高效的矩阵乘运算。在矩阵乘协处理器上高效实现BLAS level3运算,对大规模科学与工程仿真应用的计算加速至关重要。以矩阵乘为核心运算,结合线性阵列的结构特点,提出了矩阵乘协处理器上BLAS level3运算的设计,并构建了相应的性能分析模型。实验结果表明,矩阵乘协处理器上SYMM、SYRK和TRMM运算的计算效率分别达到了99%,98%和80%,与SW26010和NVIDIA V100 GPU上矩阵运算的计算效率相比,最高提升了31%。

关键词: 线性阵列, 矩阵乘, 协处理器, BLAS level

Abstract: BLAS level3 subprograms have high computation complexity, which usually become applications' performance bottleneck. By organizing largescale floatingpoint units into a linear array architecture, the matrix multiplication coprocessor can perform highperformance and efficient matrix multiplication. Achieving efficient BLAS level3 computation on the matrix multiplication coprocessor is essential for the acceleration of largescale science and engineering applications. 
By taking matrix multiplication as the kernel and combining the characteristics of the underlying linear array architecture, this paper proposes the design of BLAS level3 computation on a matrix multiplication coprocessor, and construct a corresponding performance model. Experimental results show that SYMM, SYRK and TRMM subprograms on the matrix multiplication coprocessor achieves the computation efficiency of 99%, 98% and 80% respectively, at most 31% higher than those on the SW26010 and NVIDIA V100 GPU.



Key words: linear array, matrix multiplication, coprocessor, BLAS level-3

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