关键词: RISC-V, 图卷积神经网络, 硬件加速器, 指令集

Abstract: Graph Convolutional Networks (GCN), an algorithm for processing non-Euclidean data, is currently mainly implemented on deep learning frameworks such as PyTorch for GPU acceleration. GCN's computation process involves nested matrix multiplication and data access operations, which can be satisfied by GPU in real-time but have high deployment costs and low energy efficiency. To improve the computational performance of GCN algorithm while maintaining software flexibility, this paper proposes a custom GCN accelerator based on RSIC-V SoC, which extends the dot product operation and hardware accelerator through hardware-software co-design in the hummingbird E203 SoC platform. The neural network parameter analysis determines the hardware quantization scheme from floating point to 32-bit fixed point. Experimental results show that the proposed accelerator has no accuracy loss and can achieve a maximum speedup of 6.88 times when running GCN algorithm on Cora dataset.

Key words: RISC-V, graph convolutional neural network, hardware accelerator, instruction set