Abstract: The performance of a switch is determined by its architectural implementations, such as the switching fabric, caching mechanism, and concurrent multi-port read/write operations. With the increase in the number of switch ports and port rates, how to enhance the multi-port data forwarding performance of switches has become a topic worthy of research. To meet the demands of multi-port data forwarding and non-blocking internal data exchanges, this paper proposes a distributed shared buffer  architecture for Ethernet switches based on a Crossbar structure. First, it adopts a fully connected Crossbar-based input caching structure  to ensure non-blocking input for multi-port data. Second, the switching fabric innovatively employs a distributed shared caching approach to improve data exchange rates. Finally, the design is simulated and verified on an FPGA development board. The results demonstrate that, compared to traditional switches, the proposed multi-port switch architecture with parallel read/write operations supports high-capacity data forwarding and effectively enhances data transmission bandwidth.

Key words: multi-port, Crossbar, distributed shared buffer, read/write buffer parallelism