Abstract:

Currently, smaller feature sizes and higher frequencies of deep submicron integrated circuits make ICs susceptible to singleevent upset (SEU) and singleevent transient(SET). In this paper, two kinds of timing sampling latches based on the static circuit and dynamic circuits of Muller_C are designed. Meanwhile, combining with the DICE latch, two D flipflops which can tolerate both of SEU and SET are also designed. Based on the 3D TCAD Mixed mode simulation SET is created and injected into the circuit netlist which obtain the RC parasitic parameters from the layout. The Hspice simulation results show that, these two DFFs can tolerate SEU and SET efficiently. Compared with the SEU and SET tolerant DFFs in ［1］, these two presented DFFs need less area, dynamic power, and static power at the frequency of 500 MHz, and one of the DFFs has a shorter setup time.

Key words: Muller_C;DICE;radiation hardened DFF