Abstract:

Trace generation is an inevitable step in tracedriven architecture simulation. Traces not only consume largescale storage space, but also may introduce extra intrusions to the execution of benchmarks which can result in errors of the simulation results. The trace effect of parallel tracedriven simulators has its own unique characteristics due to the design and implementation of the simulators as well as particular I/O systems of parallel hosts. We select BigSim, a typical parallel simulator, and several target parallel applications with different computation and communication ratios to evaluate the trace effect on 3 parallel host systems with different I/O modes. Our results show that trace generation has a nonignorable effect on both efficiency and accuracy of parallel simulation. The reasons of the trace effect and some possible resolutions are also discussed. The conclusion of our evaluation is helpful to the design, implementation and use of tracedriven parallel architecture simulators.

Key words: trace;parallel performance simulation;trace I/O;computer architecture