Abstract:

Incorporating the SIMD unit has become one of the important ways to improve the performance of processors.The reused lowcost hardware design method for the fixedpoint SIMD unit is mature,but it is not the case for the floatingpoint SIMD unit,which still remains the simple replication design method. To address the increasing computation demand for 128-bit quadrupleprecision floatingpoint operations,this paper proposes the hardware design of the lowcost 128bit quadrupleprecision floatingpoint SIMD fused multiplyadd (FMA) unit.The experimental results show that the structure of the proposed FMA unit can be more optimized in performance and cost parameters in comparison to the traditional 128bit quadrupleprecision floatingpoint SIMD multipleadd unit.

Key words: floatingpoint fused multiplyadd；SIMD；quadruple precision