Abstract:

The Cell processor is a typical heterogeneous multicore processor with powerful computing ability. However, we are facing the challenges of 'memory wall' in developing parallel applications, such as, limited capacity of local memory, limited memory bandwidth for multicores and the large latency for data communication. The DMA transfer mechanism is often used to hide the large latency and improve the utilization of memory bandwidth. In the paper, we start with a series of DMA experimental tests in the context of the Cell processor architecture, and perform mathematical analysis to setup a unified formula on the average bandwidth of DMA by means of exponential fitting, which describes that SPE amount and DMA block size take main effects on DMA bandwidth in quantity.

Key words: Cell；heterogeneous multicore processor；DMA；memory access model