Abstract:

As the powerful competitor of the next generation clock distribution technology, resonant clock scheme shows obvious advantages in low power consumption and low skew. But the application of this technology is limited because of the absence of a systematic design methodology. To solve the problem, a  physical design method of bufferless resonant Clock Distribution Network (CDN) was proposed in this paper. The method uses the conventional synchronous design flow and implements resonant clock network efficiently. Based on SPICE analysis and optimization for the design parameters of the resonant CDN, the proposed method makes the physical design converge fast at the target frequency. A multiplier circuit was designed using this method, and the results of post-layout SPICE show that, compared with the synchronous design employing treebased and meshbased CDN, the bufferless resonant CDN based circuit can save CDN power up to 64% and total power up to 16%. Additionally, the clock skew in resonant CDN is less than 2% of clock cycle under different process corners.

Key words: clock distribution network;resonant clock;design methodology;low power