Abstract:

As realtime predicting electromagnetic behaviors are required more and more in some realtime embedded systems, Finite Difference Time Domain (FDTD) is implemented in FPGA hardware to increase the computational speed. A novel method to implement FDTD on FPGA is proposed. The filters technology is used to rewrite the FDTD algorithm. In this way, the solution of the FDTD is transformed to the design of the corresponding hardware filters. Therefore, a suitable filter can be designed to implement the FDTD method. Experimental results show that, compared with the software implementation, the hardware implementation of FDTD obtains about 5 times speedup and can taking full advantages of FPGA computing performance. This study can further widen the application field of FDTD, and especially extend it to the fields that are not applied before due to the computing ability.

Key words: fieldprogrammable gate arrays;finite difference time domain;reconfiguration computing;hardware filters