• 中国计算机学会会刊
  • 中国科技核心期刊
  • 中文核心期刊

J4 ›› 2014, Vol. 36 ›› Issue (03): 426-432.

• 论文 • Previous Articles     Next Articles

Design and implementation of output scheduling
IP core based on packet descriptor         

ZHAO Guohong,HU Yongting,LI Tao,SUN Zhigang   

  1. (College of Computer,National University of Defense Technology,Changsha 410073,China)
  • Received:2013-07-05 Revised:2013-10-16 Online:2014-03-25 Published:2014-03-25

Abstract:

Output scheduling is an important QoS technique. The packetbased output scheduling technique is widely used for QoS component due to its simplicity. However, large onchip packet buffer required by the technique increases the chip area and production cost. Aiming at the problem, a novel output scheduling technique based on packet descriptor is proposed. The descriptorbased output scheduling technique can reduce storage space requirements without degrading system performance. The design and implementation of the output scheduling IP core based on this descriptor-based technique is also introduced, including the external interface of the IP core, the parameter configuration and the internal processing procedure. The experiments carried out on FPGA demonstrate the feasibility of the IP core.

Key words: QoS;output scheduling;descriptor;IP core