• 中国计算机学会会刊
  • 中国科技核心期刊
  • 中文核心期刊

J4 ›› 2015, Vol. 37 ›› Issue (01): 28-35.

• 论文 • Previous Articles     Next Articles

Cache structure design for big data oriented many-core processor  

WAN Hu1,XU Yuanchao1,2,SUN Fengyun1,YAN Junfeng1   

  1. (1.College of Information Engineering,Capital Normal University,Beijing 100048;2.State Key Laboratory of Computer Architecture,Institute of Computing Technology,
    Chinese Academy of Sciences, Beijing 100190,China)
  • Received:2014-05-17 Revised:2014-10-20 Online:2015-01-25 Published:2015-01-25

Abstract:

Some big data applications such as data sorting, search engine, streaming media running on the traditional latencyoriented multi/manycore processor are inefficiency. The hit rate of L1 Cache is high while that of L2/L3 Cache is relative low and IPC is not sensitive to LLC capacity. To address the low utilization issue of cache resources, we analyze the memory access patterns of big data applications, and then propose an optimization method of cache structure for manycore processor. Both the two structures  only have L1 cache, while one is fully shared cache structure, and the other is partly shared cache partition structure. The evaluation results show that these two schemes can significantly save chip area at the cost of slightly increase of memory access. When cache capacity is low, the partition structure is superior to the share structure. As cache capacity increases, the share structure will gradually become superior to the partition structure. For manycore processors, the capacity assigned to each processor is limited, thus the partition structure has certain advantages.

Key words: many-core processor;big data application;cache design;memory access behavior;data center