J4 ›› 2016, Vol. 38 ›› Issue (02): 195-201.
• 论文 • Next Articles
CHEN Yong1,YUAN Mengting2,LI Qingan2
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Abstract:
It is a research hotspot to minimize the number of bankselection instructions in the partitioned memory architecture. Analyzing the features of this problem, we construct a graph partition model for bank selection and propose a twostage heuristic search algorithm. This algorithm uses the size of nodes and partition capacity to get an initial solution quickly, and then uses the edge weights between nodes and the weighs between partitions as the heuristic parameters to search for the better solution. Experiments on MiBench benchmark and a real embedded system validate the effectiveness of the proposed model and algorithm. Compared to the VPAB algorithm, the proposal can achieve an average optimization rate of 37.99%, which is slightly better than the mature commercial compiler PICC, and can reduce the number of bank selection instructions largely.
Key words: partitioned memory;graph model;heuristic search;embedded system
CHEN Yong1,YUAN Mengting2,LI Qingan2. A bank selection instruction optimization method in partitioned memory architecture [J]. J4, 2016, 38(02): 195-201.
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http://joces.nudt.edu.cn/EN/Y2016/V38/I02/195