• 中国计算机学会会刊
  • 中国科技核心期刊
  • 中文核心期刊

Computer Engineering & Science

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Using multi-dimensional hierarchical Cache replacement  policy to reduce the write traffic to PCM memory         

RUAN Shen-chen,WANG Hai-xia,WANG Dong-sheng   

  1. (National Laboratory for Information Science and Technology,Tsinghua University,Beijing 100084,China)
  • Received:2016-04-15 Revised:2016-06-20 Online:2016-08-25 Published:2016-08-25

Abstract:

Searching for novel storage materials is a current hotspot. The phase change memory (PCM) draws wide attention due to the advantages of low power consumption, high density and non-volatility, however, it incurs finite endurance. So it is necessary to consider how to reduce the write traffic to memory. As for this problem, a optimizing cache replacement policies to reduce the amount of dirty blocks evicted from cache is an efficient method. The existing works mainly achieve the goal of protecting dirty blocks by setting higher protection priority for them when they are inserted in or re-referenced, however, they make no distinction between dirty blocks and clean ones in the process of demotion, which may leads to the result that dirty blocks are preferentially evicted even though there are still many clean blocks. We propose a novel cache replacement policy called multilayer ark for cache (MAC), which sets insurmountable boundaries between the dirty cache blocks and the clean ones through a multidimensional hierarchy structure, and dirty blocks therefore can be protected more effectively. Simulation results show that compared with the LRU replacement policy, the MAC can averagely reduce the writes to memory by about 25.12% with low hardware cost while the program performance is hardly affected.

Key words: phase change memory, Cache replacement policy, write traffic