| [1] |
SHI Lu, ZOU Gaoyuan, WU Siqi, ZHANG Shaoshuai.
High performance Tholesky factorization on emerging GPU architectures using Tensor Cores
[J]. Computer Engineering & Science, 2025, 47(7): 1170-1180.
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| [2] |
LI Zhenqi, WANG Qiang, QI Xingyun, LAI Mingche, ZHAO Yankang, LU Yihang, LI Yuan.
Design and FPGA implementation of lightweight convolutional neural network hardware acceleration
[J]. Computer Engineering & Science, 2025, 47(4): 582-591.
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| [3] |
SHEN Jinshang, ZHANG Qingshun, SONG Tierui.
Implementation of high-speed AES based on FPGA and improvement of MixColumn
[J]. Computer Engineering & Science, 2025, 47(4): 612-620.
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| [4] |
YAN Shaohui, JIANG Jiawei, CUI Yu.
Image encryption and FPGA implementation based on 3D chaotic system
[J]. Computer Engineering & Science, 2025, 47(4): 686-694.
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| [5] |
TIAN Xi, LI Tun, CHENG Yue, PI Yan, ZOU Hongji.
GPU-accelerated RTL simulation with Loop unrolling
[J]. Computer Engineering & Science, 2025, 47(2): 191-199.
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| [6] |
WANG Peng, ZHANG Jia-cheng, FAN Yu-yang, .
A neural network pruning and quantization algorithm for hardware deployment
[J]. Computer Engineering & Science, 2024, 46(9): 1547-1553.
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| [7] |
LI Pei-zhen, ZHANG Yang, CHEN Wen-bo.
Sequence alignment software migration and performance evaluation based on DPCT
[J]. Computer Engineering & Science, 2024, 46(8): 1372-1380.
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| [8] |
GUO Chen-liang, YAN Shao-hong, ZONG Chen-qi.
Research on parallel acceleration of line cloud privacy attack algorithm
[J]. Computer Engineering & Science, 2024, 46(4): 615-625.
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| [9] |
WANG Yu-hua, HE Jun-fei, ZHANG Yu-qi, XU Yue-zhu, CUI Huan-yu.
DRM: A GPU-parallel SpMV storage format based on iterative merge strategy
[J]. Computer Engineering & Science, 2024, 46(3): 381-394.
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| [10] |
MA Ke-fan, LI Bao-feng, ZHOU Yue-jin, WU Yuan-yuan, YU Yong-lan, DUO Rui-hua.
Design and implementation of a baseboard management controller on ZYNQ chip
[J]. Computer Engineering & Science, 2024, 46(2): 217-223.
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| [11] |
ZHAO Zhi-qiao, ZHOU Li, XUN Chang-qing, PAN Guo-teng, TIE Jun-bo, WANG Wei-zheng.
Efficient analysis of coherent hub interface protocol mixturing hardware and software
[J]. Computer Engineering & Science, 2024, 46(2): 224-231.
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| [12] |
LUO Jing, YE Zhi-sheng, YANG Ze-hua, FU Tian-hao, WEI Xiong, WANG Xiao-lin, LUO Ying-wei, .
Constructing and analyzing deep learning task dataset for R&D GPU clusters
[J]. Computer Engineering & Science, 2024, 46(12): 2128-2137.
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| [13] |
SUN Qing-xiao, LIU Yi, YANG Hai-long, WANG Yi-qing, JIA Jie, LUAN Zhong-zhi, QIAN De-pei.
GNNSched: A GNN inference task scheduling framework on GPU
[J]. Computer Engineering & Science, 2024, 46(1): 1-11.
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| [14] |
QIN Wen-qiang, WU Zhong-cheng, ZHANG Jun, LI Fang, .
Design of convolutional neural network acceleration system based on heterogeneous platform
[J]. Computer Engineering & Science, 2024, 46(1): 12-20.
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| [15] |
ZHU Wen-long, JIANG Jia-zhi, HUANG Dan, XIAO Nong.
ParM: A heterogeneous programming model for domestic processors
[J]. Computer Engineering & Science, 2023, 45(9): 1521-1531.
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