• 中国计算机学会会刊
  • 中国科技核心期刊
  • 中文核心期刊

Computer Engineering & Science ›› 2025, Vol. 47 ›› Issue (2): 200-209.

• High Performance Computing • Previous Articles     Next Articles

Optimization of isoline and isosurface extraction algorithm based on domestic heterogeneous many-core processors

ZHANG Yuanyin,XIAO Minguang,LIU Zhiyong,WENG Lingling,CHEN Zhiguang,LU Yutong   

  1. (School of Computer Science and Engineering,Sun Yat-sen University,Guangzhou 511400,China)
  • Received:2023-09-25 Revised:2023-11-20 Online:2025-02-25 Published:2025-02-21

Abstract: The MT-3000 is a domestic heterogeneous many-core processor designed by the National University of Defense Technology for the next generation of supercomputers. It has superior computing power and can effectively accelerate data processing in visualization. Isoline and isosurface extraction is the most common geometric visualization method for scalar field data. However, existing extraction algorithms typically target general CPUs or GPUs. On MT-3000 processors, the computing efficiency is low due to the limited cache space on-chip, bandwidth throttling of memory access from the cores, etc. In addition, due to the unique nature of programming models, existing software and methods are unable to run on MT-3000 processors directly. In order to fully utilize the computational efficiency of the domestic supercomputing systems in the field of visualization, this paper implements a new parallelization algorithm of the grid scan algorithm for isoline extraction and the marching cubes algorithm for isosurface extraction based on the hardware characteristics of MT-3000. Techniques such as vector instructions and pipeline implementation are used to better adapt to the many-core architecture, thus achieving the goal of improving performance. The experimental results show a speedup of over 4, and the execution time of both the algorithms decreases nearly linearly while increasing cores, which proves the scalability of the algorithms. 

Key words: data filtering, isoline, isosurface, parallel computing, heterogeneous, many-core, domestic supercomputing system