Abstract: Under advanced nanoscale semiconductor processes, the continuous scaling down of transistor feature sizes and the increasing level of integration have made radiation-induced triple-node-upsets increasingly prominent. To mitigate the impact of radiation particles on circuit reliability, a novel low- overhead NLC-TNUTL latch resistant to triple-node upsets is proposed. The design combines dual-mode redundancy technology with an interlocking mechanism based on the polarity inversion principle of transient pulses and input-separated inverters. HSPICE simulations and PVT variation analyses demonstrate that, compared to state-of-the-art radiation-hardened latches with equivalent fault tolerance, the proposed latch exhibits lower power consumption, reduced delay, and smaller area overhead. Additionally, it shows moderate sensitivity to threshold voltage, supply voltage, and temperature fluctuations while maintaining excellent cost-effectiveness.

Key words: latch, charge sharing effect, radiation particles, triple-node-upset