• 中国计算机学会会刊
  • 中国科技核心期刊
  • 中文核心期刊

Computer Engineering & Science ›› 2026, Vol. 48 ›› Issue (3): 467-475.

• Graphics and Images • Previous Articles     Next Articles

An improved error compensation image magnification algorithm based on FPGA implementation

WAN Zirong,ZHANG Caizhen   

  1. (School of Electronic and Information Engineering,Lanzhou Jiaotong University,Lanzhou 730070,China)
  • Received:2024-04-09 Revised:2024-10-30 Online:2026-03-25 Published:2026-03-25

Abstract: In order to maintain the edge information as much as possible and improve the visual effect of the enlarged image, an improved error compensation image enlargement algorithm based on FPGA implementation is proposed. The algorithm  is based on the theory of error compensation and adds a guided filter based on error compensation correction for each pixel. The error-compensated image is adopted as the guided image and input image of the guided  filter, adjusting pixel weights and setting the parameter ε to 0.1 to preserve more edge information. Experimental evaluations were conducted using peak signal-to-noise ratio(PSNR), mean gradient, and gradient standard deviation to compare the improved algorithm with the bilinear error compensation algorithm and analyze the results against those reported in the literature. The findings indicate that, compared to other algorithms, the improved algorithm increases the image’s PSNR by 3 dB to 9 dB, reduces the mean gradient by 9 to 36, and decreases the gradient standard deviation by 8 to 26, effectively mitigating edge distortion in images.

Key words: image enlargement, error compensation, FPGA, guided filter, edge distortion