J4 ›› 2010, Vol. 32 ›› Issue (1): 127-131.doi: 10.3969/j.issn.1007130X.2010.
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Abstract:
Software transactional memory (STM) systems use lightweight and inmemory software transactions to address concurrency in multithreaded applications, ensuring the safety at all times. Two concurrent transactions cause conflict if they access the same object and at least one of them modifies that object. When an STM system identifies a conflict, it typically allows one transaction to continue, and delays or aborts the other. The current implementation of transactional memories (TMs) has the advantage of being simple and efficient, and providing strong linearizability semantics. But in many applications,enforcing a strict linearizability consistency policy over the entire readset of a transaction can lead to a large number of unnecessary aborts. In this paper, we investigate the use of Causal Consistency with weaker semantics,which provides a good tradeoff between strong semantics and good practical performance even for long transactions. The experimental results show that the implementation is simple, and substantially reduces the number of conflicts.
Key words: software transactional memory (STM);causal consistency;validation;concurrency;threads
CLC Number:
TP314
ZHANG Xiao-Jiang, BANG Lin, HUANG Chun, XIE Lun-Guo-. A Relaxed Memory Consistency Algorithm for STM[J]. J4, 2010, 32(1): 127-131.
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URL: http://joces.nudt.edu.cn/EN/10.3969/j.issn.1007130X.2010.
http://joces.nudt.edu.cn/EN/Y2010/V32/I1/127