• 中国计算机学会会刊
  • 中国科技核心期刊
  • 中文核心期刊
论文

Design and Implementation of a HighPerformance DDR2 Controller

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  • (School of Computer Science,National University of Defense Technology,Changsha 410073,China)

Received date: 2008-11-06

  Revised date: 2009-08-26

  Online published: 2010-06-25

Abstract

DDR2 is a new generation of DDR memory technique standard published by JEDEC.This paper lucubrates the characteristics and the standard of DDR2,and presents the design and the implementation of a highperformance DDR2 controller which supports the multibank parallelizing and Openpage scheduling policy.The performance experimental results show the controller can improve memory bandwidth and reduce memory latency effectively.

Cite this article

XIA Jun,PANG Zhengbin,LI Xiaofang,PANG Guoteng,LI Yongjin . Design and Implementation of a HighPerformance DDR2 Controller[J]. Computer Engineering & Science, 2010 , 32(7) : 62 -64 . DOI: 10.3969/j.issn.1007130X.2010.

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