Design of a NAND Flash Control Interface Based on FPGA

WANG Shun,DAI Yuxing,DUAN Xiaokang

doi:10.3969/j.issn.1007130X.2010.

Computer Engineering & Science >

2010 , Vol. 32 >Issue 7: 80 - 82

DOI: https://doi.org/10.3969/j.issn.1007130X.2010.

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Design of a NAND Flash Control Interface Based on FPGA

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(School of Electrical and Information Engineering,Hunan University,Changsha 410082,China)

Received date: 2009-01-13

Revised date: 2009-03-06

Online published: 2010-06-25

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Abstract

The article details the design method of the main controller based on comparing the advantages and disadvantages of the NAND Flash and analysing the function of the control interface circuit,and the main control module maps the complex NAND Flash interface to the simple SRAM interface by writing control words.According to the ECC algorithm,the realization method of the ECC check code generation,error search,error correction is described.The function of the operating instructions of the NAND Flash control interface circuit designed by this paper is verified on the Xillinx Spartan3 board, and the frequency can reach 100MHz.

Key words： NAND flash；control interface；ECC

Cite this article

WANG Shun,DAI Yuxing,DUAN Xiaokang . Design of a NAND Flash Control Interface Based on FPGA[J]. Computer Engineering & Science, 2010 , 32(7) : 80 -82 . DOI: 10.3969/j.issn.1007130X.2010.

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