• 中国计算机学会会刊
  • 中国科技核心期刊
  • 中文核心期刊
论文

Design and Implementation of a 3GPacketFiltering Algorithm Based on FPGA

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  • (Research Center of Information Security,Southeast University,Nanjing 210096,China)

Received date: 2009-06-25

  Revised date: 2009-10-10

  Online published: 2010-07-25

Abstract

Based on the FPGA platform, a system is designed which captures and filters data packets in the PS of the TDSCDMA core network. And a high speed strategy ,which takes advantage of the Bloom filter and other algorithms,is  proposed to filter data packets with the Hash algorithm , the strategy is implemented with Verilog. Finally,the programme downloaded to the FPGA development board is tested. When the users supervised obey the uniform distribution in a largescale way,it can process the GTP packets in a linear rate and filter the packets of the specified users.

Cite this article

ZHANG Xiaoxiao,HUANG Jie . Design and Implementation of a 3GPacketFiltering Algorithm Based on FPGA[J]. Computer Engineering & Science, 2010 , 32(8) : 29 -31 . DOI: 10.3969/j.issn.1007130X.2010.

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