Largescale QR decomposition is widely used in many fields,such as signal processing,large image processing,and computational structure dynamics,and so on. Traditional methods adopt  parallel computers to accelerate  largescale QR decomposition,which is a computationintensive algorithm. This paper presents a finegrained parallel implementation of Givens Rotation QR decomposition on FPGA. A scalable linear array of processing elements (PEs),which is the core component of our hardware design,is proposed to implement this algorithm. To our knowledge,this is the first  FPGAbased implementation of largescale QR decomposition. A total of 15 GRPEs can be integrated into an Altera StratixII EP2S130F1020C5 FPGA.The experimental results show that a speedup up to 19 can be achieved relative to the Pentium Dual CPU.