Computer Engineering & Science >
A HP Heterogeneous Multiprocessor Architectural Platform and Its Application
Received date: 2010-05-06
Revised date: 2010-08-29
Online published: 2011-01-25
In the field of video codec, with the improvement of the video’s resolution, the demand of the processing platform’s computingpower, as well as the storage and transmission bandwidth, is required to be increased dramatically. To meet the huge performance requirements of highresolution video codec, this paper,which combines with the unique advantages of stream processors in the media processing and the flexibility of the FPGA, provides a configurable heterogeneous multiprocessor platform. In order to test the ability of the platform, the MOTION JPEG algorithm will be mapped to this platform after being parallelized,and encode the HD digital video with the resolution of 4096×2160 at 30.3 frame/s.
QUAN Wei,WEN Mei,WU Nan,YANG Qianming,ZHANG Chunyuan . A HP Heterogeneous Multiprocessor Architectural Platform and Its Application[J]. Computer Engineering & Science, 2011 , 33(1) : 60 -65 . DOI: 10.3969/j.issn.1007130X.2011.
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