Triple modular redundancy design for VLSI gate level netlist

中国计算机学会会刊
中国科技核心期刊
中文核心期刊

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Triple modular redundancy design for VLSI gate level netlist

XU Ranran1,2,MENG Haibo1,GUI Xiaoyan2,SHEN Xiaowei1，AN Shuqian1

Computer Engineering & Science . 2014, (12): 2355 -2360 .