• 中国计算机学会会刊
  • 中国科技核心期刊
  • 中文核心期刊

J4 ›› 2010, Vol. 32 ›› Issue (8): 29-31.doi: 10.3969/j.issn.1007130X.2010.

• 论文 • 上一篇    下一篇

基于FPGA的3G数据包过滤算法设计及实现

张晓晓,黄 杰   

  1. (东南大学信息安全研究中心,江苏 南京 210096)
  • 收稿日期:2009-06-25 修回日期:2009-10-10 出版日期:2010-07-25 发布日期:2010-07-25
  • 通讯作者: 张晓晓 E-mail:zhxiaoxiao_1986@yahoo.com.cn
  • 作者简介:张晓晓(1986女,山东临沂人,硕士生,研究方向为3G网络信息安全和FPGA逻辑设计;黄杰,副教授,研究方向为信息安全和可信计算等。
  • 基金资助:

    国家863计划资助项目(2007AA01Z432)

Design and Implementation of a 3GPacketFiltering Algorithm Based on FPGA

ZHANG Xiaoxiao,HUANG Jie   

  1. (Research Center of Information Security,Southeast University,Nanjing 210096,China)
  • Received:2009-06-25 Revised:2009-10-10 Online:2010-07-25 Published:2010-07-25
  • Contact: ZHANG Xiaoxiao E-mail:zhxiaoxiao_1986@yahoo.com.cn

摘要:

本文以FPGA为平台,设计了在TDSCDMA分组域中实现数据包截获和过滤的系统框架以及基本功能模块,结合Bloom Filter等算法的特点提出了Hash算法实现数据包过滤,并用Verilog语言实现,程序下载至FPGA开发板进行了实测。结果表明,在大规模用户群中均匀抽取部分用户进行监管时,过滤设备可以线速地处理GTP数据包并完成设定用户的过滤。

关键词: TDSCDMA, 数据包过滤, FPGA, Hash算法

Abstract:

Based on the FPGA platform, a system is designed which captures and filters data packets in the PS of the TDSCDMA core network. And a high speed strategy ,which takes advantage of the Bloom filter and other algorithms,is  proposed to filter data packets with the Hash algorithm , the strategy is implemented with Verilog. Finally,the programme downloaded to the FPGA development board is tested. When the users supervised obey the uniform distribution in a largescale way,it can process the GTP packets in a linear rate and filter the packets of the specified users.

Key words: TDSCDMA;packetfiltering;FPGA;Hash algorithm