J4 ›› 2013, Vol. 35 ›› Issue (4): 24-28.
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LI Yongjin,MAO Jianbiao,HUANG Jinfeng
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Abstract:
Memory is an important part of computer systems, and it is selfevident that the accuracy of information access has meaningful effect upon the entire system. As computer applications are widely used, memory error detection and correction is an effective means to improve the reliability of storage system. The storage system can recover correct data through ECC (Error Correcting Code) when errors occur in memory. This paper introduced some ECC algorithms used in the current computer storage systems, and analyzed the limitations of these algorithms. To cover these shortages, we proposed a chiperror correcting code based on the Bossen’s 2redundant badjacent error coding, gave the process of coding and error correction coding of this algorithm, and then used the language of verilog HDL to do the logic design. The simulation results show that the algorithm can effectively correct all singlebyte errors, and can detect most of the multiplebyte errors.
Key words: memory;ECC;2redundant badjacent error;chiperror correction
LI Yongjin,MAO Jianbiao,HUANG Jinfeng. Survey and design of chiperror correcting algorithm in memory system [J]. J4, 2013, 35(4): 24-28.
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URL: http://joces.nudt.edu.cn/EN/
http://joces.nudt.edu.cn/EN/Y2013/V35/I4/24