Abstract:

The CMOS technology has entered nanometer era. In nanometer scale, more and more transistors are integrated on one chip and the supply voltage becomes lower, and soft error problem begins to affect ground applications. At the meantime, because of the scaling down of gate oxide thickness, gateoxide degradation does a great harm to the reliability of circuits at high electric field pressure. Soft error and gateoxide degradation become the two main challenges for current and future CMOS technology. The effects of gateoxide degradation on the critical charge of SRAM cell is analyzed through an analytical model and SPICE simulation is performed to validate it. The simulation results show that, as gate-oxide degradation becomes worse, the critical charge of the SRAM cell shows approximate exponential decrease. And with the same gate-oxide degradation degree, Soft error rate of different technology scales shows an approximate linear relationship.

Key words: gate-oxide degradation;soft error;SRAM cell;critical charge;soft error rate