• 中国计算机学会会刊
  • 中国科技核心期刊
  • 中文核心期刊

J4 ›› 2015, Vol. 37 ›› Issue (04): 621-627.

• 论文 •     Next Articles

A 3-Dimension Monte Carlo simulator for
semiconductor devices based on many integrated core 

FANG Minquan1,ZHANG Weimin1,ZHANG Lilun1,2,
ZENG Lang3,4,LIU Xiaoyan5,YIN Longxiang5   

  1. (1.College of Computer,National University of Defense Technology,Changsha 410073;2.National Supercomputing Center in Guangzhou,Guangzhou 510006;3.School of Electric and Information Engineering,Beihang University,Beijing 100091;4.Spintronics Interdisciplinary Center,Beihang University,Beijing 100091;5.Institute of Microelectronics,Peking University,Beijing 100871,China)
  • Received:2014-10-11 Revised:2014-12-17 Online:2015-04-25 Published:2015-04-25

Abstract:

3D Monte Carlo simulation for semiconductor devices consumes long time. Especially when grids are growing and particles are increasing, the computing scale becomes very large. By analyzing the hotspots and the second level parallelism, the parallel scheme of the Effective Potential Method on Many Integrated Core is presented; Parallel schemes of particle free fighting, simulation information statistics and surface roughness scattering computation are researched. A 3-level parallel 3D Monte Carlo simulator for semiconductor devices is implemented and validated. Results show that the 3-level parallel program can get a better performance than the original single level parallel version. When the simulation accuracy is improved, the 3-level parallel program can get a greater speed-up ratio.

Key words: Monte Carlo;device simulating for semiconductor;many integrated core;effective potential method;particle free flight