Abstract:

Since the traditional design methods of MPSoC have large design exploration space and high design complexity, we propose a coarse grain reconfigurable SoC design method based on architecture template. The architecture template can be reused, and its parameters can be configured, so the method can reduce the design exploration space, and improve the design efficiency and computational performance. The design templates are instantiated, and a cryptographic applicationspecific multireconfigurable instruction sets processor SoC(MultiRISP SoC) is constructed. Experimental results show that the performance of the MultiRISP SoC is equivalent to several typical reconfigurable platforms, but its system is more efficient.

Key words: architecture template;multicore SoC system architecture;coarse grain reconfigurable SoC