• 中国计算机学会会刊
  • 中国科技核心期刊
  • 中文核心期刊

Computer Engineering & Science

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A high efficient E-Flash accelerator based on
pre-fetch and cache principles

JIANG Jinsong1,HUANG Kai1,CHEN Chen2,WANG Yubo3,YAN Xiaolang1   

  1. (1.Institute of VLSI Design,Zhejiang University,Hangzhou 310027;
    2.Hangzhou Secchip Technology Company Limited,Hangzhou 310012;
    3.Freescale Semiconductor Company Limited,Shanghai 200120,China )
  • Received:2015-11-06 Revised:2015-12-07 Online:2016-12-25 Published:2016-12-25

Abstract:

Based on prefetch and cache principles, we realize a Flash acceleration controller which is used to improve the efficiency of Flash memory in different embedded applications. The controller contains two acceleration schemes: prefetch cache and highspeed cache. The prefetchcache method uses the data width extension and prefetch technology to accelerate the access to sequence instructions, and uses the branchbuffer technology to reduce the missing penalty caused by the branch instruction. The highspeed cache method uses the setassociative and waypredict technology to improve instruction reuse and reduce the Flash access frequency and power consumption. The two acceleration methods can not only be selected statically by configuring related registers, but also be switched dynamically by the software flow. Several benchmark results prove the feasibility and efficiency of the proposed Flash acceleration controller in terms of performance and power optimization.

Key words: Flash, data width extension, prefetch, branchbuffer, cache, configurable, adaptive