Digital predistortion (DPD) becomes the most attractive technique in overcoming the nonlinearity and memory effects of power amplifiers (PAs) in communication systems. We propose a piecewise-linear memory polynomial (PWL-MP) model for DPD technique. Different from the generalized memory polynomial (GMP) model, our model converts the mulitplication of high order terms to the summation of PWL functions, in order to avoid the unstability of the muliplication of high order terms. As the threshold can be adjusted in the PWL-MP model, it is more flexible and accurate in the DPD technique. Experimental results show that the proposed model outperforms the GMP model while requiring less than 40% coefficients. The adjacent channel power ratio (ACPR) and the normalized mean square error (NMSE) can be improved by 1dB and 8 dB respectively. So the PWL-MP model can achieve a relatively better performance in the DPD technique.