• 中国计算机学会会刊
  • 中国科技核心期刊
  • 中文核心期刊

Computer Engineering & Science

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A 65 nm CMOS compositiveps level narrow pulse driver

XU Chaolong,LAI Mingche,LUO Zhang,XIANG Yang,PANG Zhengbin   

  1. (College of Computer,National University of Defense Technology,Changsha 410073,China)
  • Received:2017-09-10 Revised:2017-11-08 Online:2018-03-25 Published:2018-03-25

Abstract:

Depending on the breakthrough of singlechip optoelectrical integration and the advance of the optical pulse train generator technology, a new optical interconnect technology optical serializer/deserialier (SerDes) technology is proposed. Compared with traditional optical interconnect technology, optical SerDes technology is faster, lower power consumption and higher integration. The performance and integration requirement of driver circuit that drives the optical switch producing narrow optical pulse in a relative long cycle is more stringent. A 65nm CMOS integrated ps level narrow pulse driver used for optical SerDestransceiver is proposed. The driver drives optical switch producing optical pulse, which is as narrow as 13ps in SMIC 65nm CMOS library. The power voltage range is in 1.4~2.0 V, and the clock frequency is from several KHz up to 25 GHz.
 

Key words: ps, 65 nm CMOS, driver, optical switch, optical SerDes