We introduce the working principle of eMMC chip and its HS400 high speed data transmission mode, the design scheme of an eMMC controller, and the result of hardware verification. An eMMC controller that uses the DDR transmission mode for data transmission is implemented at a working frequency of 200 MHz, and the CRC verification module is employed to achieve the transmission data CRC checksum to enhance system reliability. The experimental platform adopts the motherboard/subboard architecture, and the eMMC controller is ultimately implemented on the Xilinx Zynq7000 FPGA Zedboard development board to realize communication through the FMC interface and eMMC chip board. Simulation and boardlevel tests show that data read and write operations in the HS400 mode can achieve a data transfer rate of up to 400 MB/s, which can effectively improve the access performance of the device during the actual eMMC development.