• 中国计算机学会会刊
  • 中国科技核心期刊
  • 中文核心期刊

Computer Engineering & Science

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Review:Key techniques of write endurance
improvement for phase change memory

ZHANG Zhen1,2,FU Yinjin1,HU Guyu1   

  1. (1.College of Command Information System,Army Engineering University of PLA,Nanjing 210007;
    2.Troop 73610,Nanjing 210000,China)
  • Received:2017-07-20 Revised:2017-11-09 Online:2018-09-25 Published:2018-09-25

Abstract:

With the increasing demand for timeliness in big data analytics and the prominent “memory wall” problem, the storage system becomes the bottleneck of performance improvement of the overall computer systems. The novel nonvolatile memory (NVM), especially phase change memory (PCM), has the advantages of high storage density, low power consumption, high read/write access speed, nonvolatility, small size and quakeproof ability. All these make PCM the most promising candidate for the next generation storage medium. Because of the limited write endurance of PCM, the researches on enhancing PCM lifetime by reducing write operations and performing wearleveling on storage cell attract great attention from academia and industry. We introduce key techniques of write endurance improvement from three aspects of reducing PCM write operations, uniform distribution of write count, and page migration based on hybrid memory. Furthermore, we discuss their advantages and disadvantages. Finally, future research directions of further improvement on PCM lifetime are pointed out and discussed.

Key words: phase change memory, hybrid memory, write endurance, wearleveling