| [1] |
WANG Yong, YANG Qianming, FU Wenwen, WANG Yongwen.
HSI:A high-bandwidth and low-latency protocol conversion mechanism for multiple chiplets
[J]. Computer Engineering & Science, 2026, 48(4): 580-589.
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| [2] |
TANG Yan, LI Chen, CHEN Xiaowen, LU Jianzhuang, GUO Yang.
A custom topology generation framework for domain-specific NoC
[J]. Computer Engineering & Science, 2026, 48(2): 216-227.
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| [3] |
CHEN Ziyang, CHEN Jun, ZHU Yuhan, LIU Genggeng, HUANG Xing.
A module placement algorithm based on deep reinforcement learning for fully programmable valve array biochip
[J]. Computer Engineering & Science, 2026, 48(1): 40-50.
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| [4] |
HE Xingyang1, 2, ZHOU Hongwei1, 2, ZHOU Yuxuan1, 2, SUN Yubo3, LI Mengjin1, 2.
Research on multi-protocol support technology and standardization in Chiplet interconnection interface
[J]. Computer Engineering & Science, 2025, 47(9): 1521-1534.
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| [5] |
SUN Yubo1, ZHOU Hongwei2, 3, SUN Xingyu2, 3, HE Xingyang2, 3, SONG Zhaoyang2, 3, CHEN Zhiqiang2, 3.
Research on Retimer structure and key technologies for Chiplet interconnection
[J]. Computer Engineering & Science, 2025, 47(8): 1381-1390.
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| [6] |
SHAO Jingbo, NING Jiahong, SU Xinling.
Survey on adaptive routing algorithms for 3D network-on-chip
[J]. Computer Engineering & Science, 2025, 47(10): 1745-1755.
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| [7] |
LI Cheng-ran, FANG Jia-hao, YIN Shou-yi, WEI Shao-jun, HU Yang.
Research on wafer-scale chip mapping task based on genetic algorithm
[J]. Computer Engineering & Science, 2024, 46(6): 993-1000.
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| [8] |
SHI Yang, CHEN Zhao-yun, SUN Hai-yan, WANG Yao-hua, WEN Mei, HU Xiao.
Design of independent software stack of FT-Matrix DSP
[J]. Computer Engineering & Science, 2024, 46(6): 968-976.
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| [9] |
ZHANG Jia-hao, DENG Jin-yi, YIN Shou-yi, WEI Shao-jun, HU Yang.
Exploration of the many-core data flow hardware architecture based on Actor model
[J]. Computer Engineering & Science, 2024, 46(6): 959-967.
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| [10] |
REN Bo-lin, XIAO Li-quan, QI Xing-yun, ZHANG Geng, WANG Qiang, LUO Zhang, PANG Zheng-bin, XU Jia-qing.
A low-power transmitter driver for die to die
[J]. Computer Engineering & Science, 2024, 46(4): 599-605.
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| [11] |
ZHAO Zhi-qiao, ZHOU Li, XUN Chang-qing, PAN Guo-teng, TIE Jun-bo, WANG Wei-zheng.
Efficient analysis of coherent hub interface protocol mixturing hardware and software
[J]. Computer Engineering & Science, 2024, 46(2): 224-231.
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| [12] |
LIU Ru-lin, YANG Hui, LI Tao, L Gao-feng, SUN Zhi-gang.
Design and implementation of agile switching chip for equipment platform
[J]. Computer Engineering & Science, 2024, 46(2): 200-208.
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| [13] |
JI Jun-hao, ZHANG Yu-shu, ZHAO Ruo-yu, WEN Wen-ying, DONG Li.
Adversarial visible watermark attack based on intelligent evolutionary algorithm
[J]. Computer Engineering & Science, 2024, 46(1): 63-71.
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| [14] |
GAO Wen-cai, CHEN Xiao-wen.
A hybrid-hardening soft error tolerant NoC router
[J]. Computer Engineering & Science, 2023, 45(8): 1376-1382.
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| [15] |
XIONG Guo-jie, ZHANG Jin-ming, HE Guang-hui.
Design and implementation of an efficient transmission protocol for Chiplet interconnection
[J]. Computer Engineering & Science, 2023, 45(8): 1339-1346.
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