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LI Rong-chun,ZHOU Xin,PAN Heng-yue,NIU Xin,GAO Lei,DOU Yong
Received:
2019-08-27
Revised:
2020-02-04
Online:
2020-05-25
Published:
2020-05-25
LI Rong-chun,ZHOU Xin,PAN Heng-yue,NIU Xin,GAO Lei,DOU Yong.
[1] | Pyndiah R M, Glavieux A,Picart A,et al.Near optimum decoding of product codes[C]∥Proc of 1994 IEEE GLOBECOM,1994:339-343. |
[2] | Pyndiah R M.Near-optimum decoding of product codes:Block turbo codes[J].IEEE Transactions on Communications,1998,46(8):1003-1010. |
[3] | Mukhtar H,Al-Dweik A,Shami A.Turbo product codes:Applications,challenges,and future directions[J].IEEE Communications Surveys & Tutorials,2016,18(4):3052-3069. |
[4] | IEEE standard for local and metropolitan area networks-part 16:Air interface for broadband wireless access systems: |
IEEE Std 802.16-2009(Revision of IEEE Std 802.16-2004)[S].IEEE,2009. | |
[5] | IEEE standard for local and metropolitan area networks - part 20:Air interface for mobile broadband wireless access systems supporting vehicular mobility - physical and media access control layer specification:IEEE Std 802.20-2008[S].IEEE,2008. |
[6] | Argon C,McLaughlin S W.Optical OOK-CDMA and PPM-CDMA systems with turbo product codes[J].Journal of Lightwave Technology,2002,20(9):1653-1663. |
[7] | Li Jing, Narayanan K R,Kurtas E,et al.On the performance of high-rate TPC/SPC codes and LDPC codes over partial response channels[J].IEEE Transactions on Communications,2002,50(5):723-734. |
[8] | Argon C, McLaughlin S W.An efficient chase decoder for turbo product codes[J].IEEE Transactions on Communications,2004,52(6):896-898. |
[9] | Cuevas J,Adde P,Kerouedan S,et al.New architecture for high data rate turbo decoding of product codes[C]∥ |
Proc of Global Telecommunications Conference,2002:1363-1367. | |
[10] | Argon C,McLaughlin S W.A parallel decoder for low latency decoding of turbo product codes[J].IEEE Communications Letters,2002,6(2):70-72. |
[11] | Yoo K,Shin H,Jung Y,et al.An efficient high-speed block turbo code decoding algorithm and hardware architecture design[C]∥ |
Proc of 2003 IEEE Workshop on Signal Processing Systems,2003:41-44. | |
[12] | Tuttlebee W.Software defined radio:Enabling technologies[M].Chickester,UK:john Wiley & Sons Ltd.,2002. |
[13] | Falcao G,Silva V,Sousa L.How GPUs can outperform ASICs for fast LDPC decoding[C]∥Proc of the 23rd International Conference on Supercomputing,2009:390-399. |
[14] | Li R, Dou Y, Zou D. Efficient parallel implementation of three-point viterbi decoding algorithm on CPU,GPU,and FPGA[J].Concurrency & Computation Practice & Experience, |
20 | 14,26(3):821-840. |
[15] | Wang Y,Wang F,Li R,et al.An efficient CPU-GPU hybrid parallel implementation for DVB-RCS2 receiver[J].Concurrency and Computation:Practice and Experience,2018,30(19):e4529. |
[16] | Li R,Dou Y,Zou D,et al.Efficient graphics processing unit based layered decoders for quasicyclic low-density parity-check codes[J].Concurrency and Computation:Practice and Experience,2015,27(1):29-46. |
[17] | Jego C,Adde P,Leroux C.Full-parallel architecture for turbo decoding of product codes[J].Electronics Letters,2006,42(18):1052-1054. |
[18] | Cho J,Sung W. High-throughput decoding of block turbo codes on graphics processing units[C]∥Proc of |
20 | 17 IEEE International Workshop on Signal Processing Systems(SiPS),2017:1-6. |
[19] | Elias P.Error-free coding[J].Transactions of the IRE Professional Group on Information Theory, 1954,4(4):29-37. |
[20] | Chase D.Class of algorithms for decoding block codes with channel measurement information[J].IEEE Transactions on Information Theory,1972,18(1):170-182. |
[21] | Cheng J,Grossman M,Mckercher T.Professional CUDA C programming[M].UK:Wrox Press Ltd.,2014. |
[22] | Peters H,Schulz-Hildebrandt O,Luttenberger N.Fast in-place,comparison-based sorting with CUDA:A study with bitonic sort[J]. Concurrency and Computation:Practice and Experience,2011,23(7):681-693. |
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