Abstract: With the increase of the number of processor cores, the structure of Network-on-Chip (NoC) is becoming more and more complex, which leads to an increase in the power consumption of NoCs. The difficulty of analyzing the power consumption of NoCs is also increasing. Task mapping of NoCs not only ensure the high performance of the communication between multi-processor cores, but also ensure that the power consumption and area are as small as possible. That is to say, high performance is achieved under limited power consumption and area overhead. During task mapping, the communication distance between cores is the key to reduce the power consumption of task communication. Continuous and near-convex areas help reduce the communication distance of the task. This paper analyzes a power-optimized NoC heuristic mapping algorithm (INC), which is composed of region selection algorithm and node mapping algorithm. The two factors of the region selection algorithm are improved to minimize the total communication energy consumption in the system and ensure that the subsequent applications do the region selection at the minimum communication cost. Therefore, a new task mapping algorithm based on region selection is proposed. They are all used in dynamic application mapping. The experimental results show that the new region selection algorithm and the node mapping algorithm can reduce the power consumption by 12.10%, and optimize the communication latency by 11.23%, in comparison to INC.

Key words: Network-on-Chip (NoC);NIRGAM, power consumption;multicore interconnection