| [1] |
LI Zhenqi, WANG Qiang, QI Xingyun, LAI Mingche, ZHAO Yankang, LU Yihang, LI Yuan.
Design and FPGA implementation of lightweight convolutional neural network hardware acceleration
[J]. Computer Engineering & Science, 2025, 47(04): 582-591.
|
| [2] |
SHEN Jinshang, ZHANG Qingshun, SONG Tierui.
Implementation of high-speed AES based on FPGA and improvement of MixColumn
[J]. Computer Engineering & Science, 2025, 47(04): 612-620.
|
| [3] |
YAN Shaohui, JIANG Jiawei, CUI Yu.
Image encryption and FPGA implementation based on 3D chaotic system
[J]. Computer Engineering & Science, 2025, 47(04): 686-694.
|
| [4] |
WANG Peng, ZHANG Jia-cheng, FAN Yu-yang, .
A neural network pruning and quantization algorithm for hardware deployment
[J]. Computer Engineering & Science, 2024, 46(09): 1547-1553.
|
| [5] |
CHEN Jie, LI Cheng, LIU Zhong.
Convolutional neural network inference and training vectorization method for multicore vector accelerators
[J]. Computer Engineering & Science, 2024, 46(04): 580-589.
|
| [6] |
MA Ke-fan, LI Bao-feng, ZHOU Yue-jin, WU Yuan-yuan, YU Yong-lan, DUO Rui-hua.
Design and implementation of a baseboard management controller on ZYNQ chip
[J]. Computer Engineering & Science, 2024, 46(02): 217-223.
|
| [7] |
ZHAO Zhi-qiao, ZHOU Li, XUN Chang-qing, PAN Guo-teng, TIE Jun-bo, WANG Wei-zheng.
Efficient analysis of coherent hub interface protocol mixturing hardware and software
[J]. Computer Engineering & Science, 2024, 46(02): 224-231.
|
| [8] |
QIN Wen-qiang, WU Zhong-cheng, ZHANG Jun, LI Fang, .
Design of convolutional neural network acceleration system based on heterogeneous platform
[J]. Computer Engineering & Science, 2024, 46(01): 12-20.
|
| [9] |
ZHOU Li, ZHAO Zhi-qiao, PAN Guo-teng, TIE Jun-bo, ZHAO Wang.
RISC-V based design of graph convolutional neural network accelerator
[J]. Computer Engineering & Science, 2023, 45(12): 2113-2120.
|
| [10] |
HU Qing-meng, , WANG Hong-bin, WANG Jun-zhong.
A Chinese event detection method based on nugget proposal network with part-of-speech attention mechanism
[J]. Computer Engineering & Science, 2023, 45(08): 1490-1497.
|
| [11] |
YI Xiao, MA Sheng, XIAO Nong.
Running optimization of deep learning accelerators under different pruning strategies
[J]. Computer Engineering & Science, 2023, 45(07): 1141-1148.
|
| [12] |
LIU Xiao-hang, JIANG Jing-fei, XU Jin-wei.
A fused-layer attention model accelerator based on systolic array
[J]. Computer Engineering & Science, 2023, 45(05): 802-809.
|
| [13] |
WANG Yu-lei, XIE Kai-liang, CHEN Si-yun, HU Jie, CHANG Sheng.
A universal design on hardware acceleration of convolutional neural networks
[J]. Computer Engineering & Science, 2023, 45(04): 577-581.
|
| [14] |
DU Jie, LUO Li-ming, SUN Zhong.
Event extraction technology based on ALBERT pre-trained model
[J]. Computer Engineering & Science, 2023, 45(04): 711-717.
|
| [15] |
YANG Hao, ZHAO Gang, WANG Xing-fen.
A hybrid model for event trigger word extraction
[J]. Computer Engineering & Science, 2023, 45(01): 171-180.
|